Researchers at NIST’s Physical Measurement Laboratory have developed a new method to fabricate large-area graphene sheets, which are crucial for advancing quantum Hall resistance standards. The process involves heating silicon carbide wafers to extremely high temperatures (up to 2100°C) in an argon environment, causing the silicon to sublimate and leave behind high-quality graphene sheets.
The goal is to produce graphene devices large enough (hundreds of micrometers) to enable the development of quantized Hall resistance standards that can be distributed to other national metrology institutes and U.S. national labs. This research could lead to new device architectures beyond the limitations of CMOS technology and contribute to the development of beyond-CMOS logic.
Several NIST groups are collaborating on this research, with funding provided for innovative measurement methods to understand how graphene’s macroscale behavior arises from its nanoscale properties. The ultimate aim is to develop graphene as an active element in innovative device architectures that could revolutionize electronics beyond current CMOS limitations.
Source: https://www.nist.gov/news-events/news/2011/10/pml-develops-graphene-fabrication-capability
Keywords: Graphene, Quantum Hall effect, Standard, Metrology, Nanoscale
